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Stars gained: From May 8, 2026 to Nov 12, 2026, each from zeroStars gainedFrom May 8, 2026 to Nov 12, 2026, each from zero0200May 8Nov 12, 2026openhwfoundation/cva6SpinalHDL/VexRiscv
Stars: The star count at the end of each dayStarsThe star count at the end of each day3K3.2KMay 8Nov 12, 2026openhwfoundation/cva6SpinalHDL/VexRiscv

Facts

Fact openhwfoundation/cva6

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

SpinalHDL/VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation

Stars 3,1913,309
Net stars, last 30 days +39+26
Largest star day +6 on May 11, 2026+6 on Aug 31, 2026
Milestone reached in the record NoneNone
Forks 1,056522
Language AssemblyAssembly
License Other licenseMIT
Created Jan 23, 2018Mar 8, 2017
Last push Nov 12, 2026Oct 13, 2026
Archived NoNo
Health facts: Maintenance 2 of 4 checks (2 without data)2 of 4 checks (2 without data)
Health facts: Releases 0 of 3 checks (1 without data)0 of 3 checks (2 without data)
Health facts: Security practice 0 of 1 check (1 without data)0 of 1 check (1 without data)
Health facts: Community files 1 of 3 checks (2 without data)1 of 3 checks (2 without data)
Commits, last 13 weeks No dataNo data
Weeks with commits, last 52 No dataNo data
In the Repository Index since Nov 11, 2026Nov 11, 2026

Topics that all of them have on the Repository Host: cpu, fpga. The facts come from the Repository Host and from the Star History that AwesomeRepos records. A shared topic does not mean that one repository can replace another. Each Health Facts row is one dimension alone. AwesomeRepos does not add them into one score. How each check is defined

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