Open-source high-performance RISC-V processor
- risc-v
- microarchitecture
- chisel
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Open-source high-performance RISC-V processor
Chisel: A Modern Hardware Design Language
Rocket Chip Generator
The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.
cocotb: Python-based chip (RTL) verification
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
SonicBOOM: The Berkeley Out-of-Order Machine
Ibex is a small 32-bit RISC-V CPU core with high-level of verification (previously known as zero-riscy)