The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.
- systemverilog-hdl
- cpu
- asic
- fpga
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An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
- rocket-chip
- chip-generator
- chisel
- riscv
RTL, Cmodel, and testbench for NVDLA