Open-source high-performance RISC-V processor
- risc-v
- microarchitecture
- chisel
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Open-source high-performance RISC-V processor
Chisel: A Modern Hardware Design Language
The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.
A machine learning accelerator core designed for energy-efficient AI at the edge.
Open source FPGA-based NIC and platform for in-network compute
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
Scots Army Knife for electronics
GPGPU microprocessor architecture
Machine learning on FPGAs using HLS
A modern hardware definition language and toolchain based on Python
The Ultra-Low Power RISC-V Core
A Pi emulating a GameBoy sounds cheap. What about an FPGA?