Repository Index

A minimal GPU design in Verilog to learn how GPUs work from the ground up

Chisel: A Modern Hardware Design Language

• chisel
• chisel3
• scala
• firrtl

A FPGA friendly 32 bit RISC-V CPU implementation

• riscv
• soc
• cpu
• spinalhdl

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

• systemverilog-hdl
• cpu
• asic
• fpga

Verilog Ethernet components for FPGA implementation

A machine learning accelerator core designed for energy-efficient AI at the edge.

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

• riscv
• verilog
• risc-v
• fpga

cocotb: Python-based chip (RTL) verification

• python
• vhdl
• verilog
• uvm

A Pi emulating a GameBoy sounds cheap. What about an FPGA?

CHIP-8 console on FPGA

• fpga
• verilog
• chip-8
• tinyfpga-bx

Implementation Nintendo's GameBoy console on an FPGA

Game Boy Classic fully functional FPGA implementation from scratch

A systemVerilog implementation of Game Boy on DE1-SoC