Repository Index

A FPGA friendly 32 bit RISC-V CPU implementation

• riscv
• soc
• cpu
• spinalhdl

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

• systemverilog-hdl
• cpu
• asic
• fpga

Verilog Ethernet components for FPGA implementation

cocotb: Python-based chip (RTL) verification

• python
• vhdl
• verilog
• uvm

Verilog AXI components for FPGA implementation

Ibex is a small 32-bit RISC-V CPU core with high-level of verification (previously known as zero-riscy)

• hardware
• cpucore
• risc-v
• rv32

A modern hardware definition language and toolchain based on Python

• fpga
• hdl
• amaranth-hdl

RISC-V CPU Core (RV32IM)

• risc-v
• cpu
• verilog
• fpga

Multi-platform nightly builds of open source digital design and verification tools

Dataflow compiler for QNN inference on FPGAs

• dataflow
• quantization
• fpga
• compiler

Implementation Nintendo's GameBoy console on an FPGA

Gameboy CPLD implementation of MBC5/MBC1 Hybrid

Game Boy Classic fully functional FPGA implementation from scratch

A systemVerilog implementation of Game Boy on DE1-SoC